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Master's Degree Project Proposal

This page describes what I wish to build, and the staps required to build it.

0.  Multipliers. In PUC we are building multipliers, and evaluating their size.  A verilog version can be reused later. 

1.  Math ALU.  In the second semester we are building a RISC-V chip.   If I work on the ALU, math operations, it can be reused later. 


3. A stack machine.  Things like the zpu can be quite small. Here is a list of Forth stack machines.  

3.  A barrel processor stack machine for real time control.  8 processors share resources, in a hot one rotation.  Great for real time control, the clock speed is much faster than the real world.  And each control system can get its own core, much easier than writing verilog.

We will see how far I get on this project, but the environment certainly encourages rapid progress.

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